| 摘要 |
PROBLEM TO BE SOLVED: To improve the operating speed of an LSI by reducing the cell area or parasitic resistance of the LSI. SOLUTION: On source-drain region 29 and 30 on both sides of a gate electrode 22 of a field effect transistor (MOSFET) 10, embedded conductive layers 37 and 38 which are respectively connected to the regions 29 and 30 are provided. The conductive layer 37 is formed in such a way that at least part of the layer 37 overlaps the conductive layer 37 side of a gate electrode 22 via an insulating film (offset insulating film 25, sidewall 26, etc.), as viewed from top, and the conductive layer 38 is also formed in such a way, that at least part of the layer 38 overlaps the conductive layer 38 side of the gate electrode 22 via the insulating film (offset insulating film 25, sidewall 26, etc.), in the top view. |
