| 摘要 |
<p>A semiconductor memory comprising a memory cell block 111 comprising a plurality of memory cells, having n pairs of parallel bit structure; two pairs of word lines WL connected to said memory cells of said memory cell block; n pairs of bit lines BL, /BL connected to said memory cells of said memory cell block; n pairs of DQ data lines DQ05, /DQ05 - DQ35, /DQ35 connected to said n pairs of bit lines and divided into two groups each comprising n/2 pairs of the DQ data lines, a group of n/2 pairs of the DQ lines being arranged at a side of said memory cell block and another group of n/2 pairs of the DQ lines being arranged at an opposite side of said memory cell block. <IMAGE></p> |
