发明名称 |
Semiconductor device having an element inclusion region for reducing stress caused by lattice mismatch |
摘要 |
A semiconductor device improves its electrical characteristics by reducing crystal defects in the vicinity of junction interfaces between a semiconductor layer, and a metal compound layer composed of semiconductor and metal elements, and between an epitaxial layer and its forming substrate. A pair of source/drain layers (52) are separately formed in a surface of a well layer (50), and a metal silicide layer (8) is formed thereon. A nitrogen inclusion region (9) is formed in the vicinity of a junction interface between the source/drain layers (52) and the metal silicide layer (8).
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申请公布号 |
US5923070(A) |
申请公布日期 |
1999.07.13 |
申请号 |
US19970937002 |
申请日期 |
1997.09.24 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
YAMADA, KEIICHI |
分类号 |
H01L21/20;H01L21/265;H01L21/285;H01L21/336;H01L21/60;H01L21/8234;H01L29/08;H01L29/165;H01L29/78;(IPC1-7):H01L29/76;H01L27/082;H01L29/30 |
主分类号 |
H01L21/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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