| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory in which crosstalk of write-in data to read-out data is reduced and read-out and write-in are performed in the same cycle. SOLUTION: This device has plural word lines WL, plural bit lines LBL, memory cells CELL connecting the word lines and the bit lines, global bit lines RGBL for sense, global bit lines WBGL for writing, and selecting circuits YSWn connecting the global bit lines for sense/writing and the bit lines. And a first and a second global bit lines for writing are arranged between a first and a second global bit lines for sense, the first global bit lines for writing are adjacent to the first global bit lines for sense, the second global bit lines for writing are adjacent to the second global bit lines for sense, both distance between adjacent lines are larger than distance between the first and the second global bit lines for writing. |
