发明名称 IMPROVED INSTRUCTION DISPATCH MECHANISM FOR A GUARDED VLIW ARCHITECTURE
摘要 <p>A very long instruction word (VLIW) architecture describes a processor comprising multiple functional units operating in parallel. A very long instruction word contains a plurality of fields or issue slots for specifying which operations are to be performed by the functional units. Execution of an operation can be inhibited by a guard value specified in the issue slot. Instructions are dispatched in such a guarded VLIW architecture by routing one of a plurality of fields issued for a common functional unit based on the guard value. Thus, an instruction word may contain a greater number of issue slots than there are functional units.</p>
申请公布号 WO1999034282(A1) 申请公布日期 1999.07.08
申请号 IB1998001521 申请日期 1998.10.01
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址