发明名称 PLURAL PROCESSORS SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a system which executes only the partial change of data in a slave-side system at the time of transferring data from a master-side system. SOLUTION: At the time of transferring data from the master-side system to the salve-side system through a common memory DPRAM (dual port memory), the transfer block of less than the capacity of the common memory, which is transferred by one transfer operation, is constituted of information on division data obtained by dividing transfer data on the master-side system into plural pieces of data, the write start address of division data into the memory of the slave-side system and the data length of division data. Thus, data on only the change part is transferred to the prescribed address and only the change part can easily be changed when only a part of the program in the slave-side memory changes.
申请公布号 JPH11184831(A) 申请公布日期 1999.07.09
申请号 JP19970357105 申请日期 1997.12.25
申请人 KOBE STEEL LTD 发明人 YAMASHITA TOSHIRO;SHIMODA TOSHIAKI;TAKAHASHI TETSUYA;HARADA KAZUSHIGE
分类号 G06F15/167;H04L29/06;H04L29/08;(IPC1-7):G06F15/177 主分类号 G06F15/167
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