发明名称 |
Apparatus and method for fault tolerant operation of a multiprocessor data processing system |
摘要 |
A fault tolerant multiple processor data processing system is described. The system includes a number of processors linked together in a network. One processor is designated the master processor and coordinates the operation of all of the processors. The network is coupled to a number of memory devices which store information which is utilized by the processors. The apparatus includes a redundant mechanism for identifying a failure of a processor. If the master processor fails, a new master processor is selected, in a dynamic manner, from the remaining operative processors. The selection of a new master processor is based upon a contention operation in which the operative processors contend to become the new master processor.
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申请公布号 |
US5919266(A) |
申请公布日期 |
1999.07.06 |
申请号 |
US19930041770 |
申请日期 |
1993.04.02 |
申请人 |
CENTIGRAM COMMUNICATIONS CORPORATION |
发明人 |
SUD, RAMAN K.;KOVERMAN, CHRIS;CAI, JINGSONG;HILL, THOMAS |
分类号 |
G06F11/00;(IPC1-7):G06F13/00 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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