发明名称 SAT SIGNAL GENERATING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To eliminate noise emission to peripheral circuits caused by a discontinuous point of a phase by preventing the occurrence of phase discontinuous point in a SAT transmission signal. SOLUTION: A SAT transmission signal output section is provided with a PLL phase-locked loop circuit B27. The PLL phase-locked loop circuit B27 oscillates by itself at a frequency other than it is instructed in advance from a base station when a mobile terminal is not receiving the SAT signal instructed to itself, but it oscillates at a frequency synchronous with the SAT signal when it is not receiving the SAT signal.
申请公布号 JPH11177483(A) 申请公布日期 1999.07.02
申请号 JP19970361752 申请日期 1997.12.10
申请人 OKI ELECTRIC IND CO LTD 发明人 YOSHIDA TATSUMASA
分类号 H04B7/26;H04W56/00 主分类号 H04B7/26
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