发明名称 SYNCHRONOUS TYPE SEMICONDUCTOR MEMORY DEVICE AND DATA OUTPUT METHOD
摘要 <p>PROBLEM TO BE SOLVED: To normally operate a semiconductor memory device at a low frequency even if it does not operate properly at a high frequency by generating a level transition of itself in response to a signal that shifts later out of an auxiliary signal and a preliminary signal where a required level transition occurs. SOLUTION: A control signal NDL0 responds to a signal that shifts later (second time) out of an auxiliary signal XAD0 and a preliminary signal XPRE1, thus shifting a level. At a high frequency, the level transition of the auxiliary signal XAD0 occurs after that of the preliminary signal XPRE1, the level transition of the auxiliary signal XAD0 from a low to high state is detected, a level transition is generated from a high to low state in the control signal NDL0, and a register 201 shuts off the input of output line data DIOB. At a low frequency, the level transition of the preliminary signal XPRE1 occurs after that of the auxiliary signal XAD0, the level transition from the high to low state of the preliminary signal XPRE1 is detected, and the level transition of the control signal NDL0 from a high to low state occurs.</p>
申请公布号 JPH11176161(A) 申请公布日期 1999.07.02
申请号 JP19980273570 申请日期 1998.09.28
申请人 SAMSUNG ELECTRON CO LTD 发明人 LEE GYU-CHAN;KIN NANSHO
分类号 G11C11/413;G11C7/10;G11C7/22;G11C11/401;G11C11/407;G11C11/409;(IPC1-7):G11C11/407 主分类号 G11C11/413
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