发明名称 ZERO POWER IC MODULE
摘要 An integrated circuit package encapsulates a volatile memory chip and a backup battery for preserving data in the event of loss of main power supply. The package includes a finger lead assembly encapsulated within a body of non-conductive material, with a central base support finger lead being offset within an interconnect region. One terminal of the battery is welded to the offset base finger lead, and the integrated circuit chip is bonded directly onto the other battery terminal by a layer of conductive epoxy. The stacked assembly of the integrated circuit chip, the battery and the offset base finger lead is centered longitudinally and vertically within the interconnect region whereby the stacked assembly, including gold interconnect wires, are completely encapsulated within the molded package body, without increasing the standoff height of the package. <IMAGE>
申请公布号 KR100206533(B1) 申请公布日期 1999.07.01
申请号 KR19910009440 申请日期 1991.06.05
申请人 STMICROELECTRONICS INC. 发明人 DANIEL, QUEYSSAC;RICHARD, KINGSTON ROBINSON;KIMI, SHEREE HUSSE
分类号 H01L23/48;H01L23/495;H01L23/58;H05K3/34 主分类号 H01L23/48
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