HIGH INTEGRITY BORDERLESS VIAS WITH HSQ GAP FILLED PATTERNED CONDUCTIVE LAYERS
摘要
Borderless vias (55) are formed in electrical connection with a lower metal feature of a metal pattern gap filled with HSQ (52). Heat treatment in an inert atmosphere is conducted before filling the through-hole to outgas water absorbed during solvent cleaning of the through-hole, thereby reducing via void formation and improving via integrity.
申请公布号
WO9931725(A1)
申请公布日期
1999.06.24
申请号
WO1998US26951
申请日期
1998.12.18
申请人
ADVANCED MICRO DEVICES, INC.
发明人
TRAN, KHANH;HUANG, RICHARD, J.;CHAN, SIMON, S.;YOU, LU