发明名称 |
Digital signal error reduction apparatus |
摘要 |
A digital signal error reduction apparatus of the present invention tracks and reduces both quickly changing errors and static errors in a digital signal which are caused by time variant multipath distortion, co-channel interference, and other transmission path interferences, including nonlinear distortion. A transversal filter is implemented for filtering the digital signal. A error detection device is implemented for calculating an error of the digital signal. A coefficient engine device is used for receiving the digital signal and the error, for extracting the error, and for updating a tap coefficient for the transversal filter so that the error is minimal.
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申请公布号 |
US5914983(A) |
申请公布日期 |
1999.06.22 |
申请号 |
US19950523913 |
申请日期 |
1995.09.06 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
BOWSER, TODD STEPHEN;HAYASHI, DAISUKE;KANNO, IPPEI;SAKASHITA, SEIJI;OZEKI, HIROAKI |
分类号 |
H03H15/00;H03H21/00;H04B3/06;H04L25/03;H04L27/01;(IPC1-7):H03H7/30;H03H7/40;H03K5/159 |
主分类号 |
H03H15/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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