MEMORY READ AND WRITE METHOD AND DEVICE

摘要

PROBLEM TO BE SOLVED: To prevent an outsider from analyzing the program stored in a memory and also transforming wrong the program by switching a bus to a pattern different from the normal one when a CPU writes the data into the memory and switching again the bus to the normal pattern when the CPU reads the data out of the memory. SOLUTION: The scramble value is set to a data scramble/descramble circuit 5 and an address scramble circuit 6 which are contained in a scramble circuit 7. Thus, a data bus DB and an address bus AB are partly scrambled and connected to a data terminal DT and an address terminal AD of an SRAM 3 or a flash memory 4 as a scramble data bus SQDB and a scramble address bus SQAB respectively. A CPU 1 writes the scramble value into a non-scramble area of the memory 4. Then the CPU 1 copies an application program of the SRAM 3 to the memory 4.