发明名称 EASILY TESTED INTEGRATED CIRCUIT, DESIGNING METHOD FOR EASILY TESTING INTEGRATED CIRCUIT, AND STORAGE MEDIUM FOR READING PROGRAM FOR DESIGNING FOR EASILY TESTING INTEGRATED CIRCUIT BY COMPUTER
摘要
申请公布号 JPH11166962(A) 申请公布日期 1999.06.22
申请号 JP19970332832 申请日期 1997.12.03
申请人 HANDOTAI RIKOUGAKU KENKYU CENTER:KK 发明人 FUJIWARA HIDEO;MASUZAWA TOSHIMITSU;OTAKE TETSUSHI
分类号 G01R31/28;G01R31/3183;G01R31/3185;G06F17/50;(IPC1-7):G01R31/318 主分类号 G01R31/28
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