| 摘要 |
Production of an IC component, with embedded DRAM circuits and logic circuits on a single substrate, involves (a) producing transfer FETs (104) in and on embedded DRAM circuit regions of the substrate (100); (b) producing logic FETs (120) in and on the logic circuit regions of the substrate (100); (c) forming a first insulating layer (136) on the transfer FETs (104) and on the logic FET (120)s; (d) defining first and second openings (146, 148) in the first insulating layer to expose the source/drain regions (138, 140) of at least one of the transfer FETs (104) and defining a third opening (150) to expose at least one conductor (134) within the logic circuit; (e) producing a first conductive layer (152) on the first insulating layer and within the openings for contacting one of the source/drain regions of a transfer FET (104), the conductive layer not filling the first opening (146); (f) producing a capacitor dielectric layer and then a second conductive layer within the first opening (146); and (g) patterning the conductive layers for laterally delimiting the upper and lower electrodes of a charge storage capacitor of an embedded DRAM. |
