发明名称 NONVOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory which can practice a stable operation and a high speed access operation. SOLUTION: A timing generating means 51 which generates a timing signal by which a memory core unit 4 is made to practice an access operation uses 1st and 2nd clocks whose periods are identical and whose phases are different. The 1st clock which has an advanced phase than the 2nd clock is used in order to generate a timing signal for processing at least one event in the first half of a plurality of read access events and the 2nd clock is used in order to generate a timing signal for processing remaining events.</p>
申请公布号 JPH11149786(A) 申请公布日期 1999.06.02
申请号 JP19970317441 申请日期 1997.11.18
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NISHIDA YOICHI;KATAOKA TOMONORI;KAMITAKA SATOSHI;FUCHIGAMI IKUO;KIMURA TOMOO;MICHIYAMA JIYUNJI
分类号 G11C16/02;G11C16/32;(IPC1-7):G11C16/02 主分类号 G11C16/02
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