发明名称 FIELD EFFECT TRANSISTOR LIMITER CIRCUITRY
摘要 An amplifier/limiter circuit includes an amplifier providing an output signal having a potential range between ground and V D volts. A first pair of parallel connected complementary transistors have their principal conduction paths coupled between the output terminal of the amplifier and an amplifier/limiter output terminal. A second pair of parallel connected complementary transistors have their principal conduction paths coupled between the amplifier/limiter output terminal and a point of reference potential having a potential value between V D and ground. The amplifier/limiter output terminal provides a linear, amplified version of signal provided to the amplifier circuit over a limited range of potentials between V D and ground, which range is less than V D.
申请公布号 CA2012239(C) 申请公布日期 1999.06.01
申请号 CA19902012239 申请日期 1990.03.15
申请人 发明人 SAUER, DONALD JON
分类号 H03G11/00;(IPC1-7):H03F1/52 主分类号 H03G11/00
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