发明名称 VOLTAGE BALANCE CIRCUIT FOR POLYPHASE GENERATOR
摘要 An in-line voltage balancing circuit sums a trim voltage with each phase voltage of a polyphase generating system to assure that the voltage between each phase and neutral is equal to the average voltage of all the phases. An individual error signal representative of the difference between each phase voltage and the average voltage is provided to individual phase modulator circuits. The phase modulator circuits develop pulse width modulated signals wherein the pulse width is proportional to the amplitude of the error signal. The outputs of the phase modulator circuits are connected to switching amplifiers which provide trim voltages proportional to the phase modulated signals. Summing transformers are employed to sum the individual trim voltage with appropriate phase voltage so that the voltage for each phase equals the average voltage.
申请公布号 JPS53143958(A) 申请公布日期 1978.12.14
申请号 JP19780028794 申请日期 1978.03.15
申请人 SUNDSTRAND CORP 发明人 DEBITSUDO JIEI FUTSUKAA;NORUBERUTO ERU SHIYUMITSUTSU
分类号 H02J3/26 主分类号 H02J3/26
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