发明名称 SYNCHRONOUS BURST SEMICONDUCTOR MEMORY DEVICE WITH PARALLEL INPUT/DATA TEST BLOCK
摘要 <p>PROBLEM TO BE SOLVED: To obtain a synchronous burst semiconductor memory device in which an input/output strobe block depending on the length of a burst is generated properly by a method wherein, a when a signal data rate mode and every data word are synchronously driven in every edge of an external clock signal, a plurality of decoding signals are activated sequentially in a double signal data rate mode. SOLUTION: A synchronous semiconductor device is operated so as to be synchronized with a pair of complementary external signal clock signals K, the inverse of K. A first decoder 170 generates a plurality of first decoding signals RS1, RS2,..., RSn in an SDR mode and a plurality of decoding signals RD1, RD2,..., RDn in a DDR mode. The first decoding signals RS1,..., RSn and the second decoding signals RD1,..., RDn are activated sequentially, and initial data is synchronized with strobe clock signals KOUT1,..., KOUTn so as to be output to an I/O pad 300 via a data output buffer 110.</p>
申请公布号 JPH11134860(A) 申请公布日期 1999.05.21
申请号 JP19980250186 申请日期 1998.09.03
申请人 SAMSUNG ELECTRON CO LTD 发明人 KIN SHUTETSU;YU HAK-SOO;TEI MINCHURU
分类号 G11C11/407;G06F12/00;G11C7/10;G11C11/409;(IPC1-7):G11C11/407 主分类号 G11C11/407
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