| 摘要 |
PROBLEM TO BE SOLVED: To suppress, the lateral expansion of code ions at the time of implantation thereof and easily prevent the variation of the threshold value of a memory cell transistor, in a mask ROM fabricated by multi-valued cell technology. SOLUTION: An interlayer insulating film 5 on a memory cell constituting a mask ROM or the surface of a gate electrode 3 of an insulated gate FET constituting the memory cell is planarized. Prior to code ion implantation for changing a threshold value of the insulated gate FET, the interlayer insulating film 5 on the insulated gate FET is selectively etched to form openings 7 and then is made thin. Or an etching stopper layer is formed in the interlayer insulating film 5 for facilitating the control of film thickness reduction of the interlayer insulating film. |
