发明名称 STORAGE
摘要 <p>PROBLEM TO BE SOLVED: To prevent DRAMs mounted on a memory board or memory module from going to a refresh mode all at once, resulting in the temporary flow of a high current causing overlapped power noises. SOLUTION: The storage has a decode chip 20 comprising a circuit 22 for judging a refresh mode, based on input control signals RE, CE and signal switching circuit 24 for generating control signals shifted in time to be fed to dynamic RAMs 11A-11D when the circuit 22 judges the mode to shift the dynamic RAMs 11A-11D to a self refreshing operation.</p>
申请公布号 JPH11134857(A) 申请公布日期 1999.05.21
申请号 JP19970294098 申请日期 1997.10.27
申请人 HITACHI LTD;HITACHI VLSI ENG CORP 发明人 SUZUKI MASATO;INOUE YOSHIHIKO
分类号 G11C11/406;G11C11/403;(IPC1-7):G11C11/406 主分类号 G11C11/406
代理机构 代理人
主权项
地址