Time slot interchanger and digital communications terminal for ISDN D-channel assembly

摘要

The invention comprises a time slot interchanger and method for multiplexing ISDN D-channel signals into multiplexed signals in a digital communications terminal. The method comprises receiving a frame of communication signals wherein some of the communication signals represent ISDN D-channel signals. The frame of communication signals is stored in memory during a first frame period. During a second frame period, at least some of the stored communication signals are retrieved from memory. Multiplexed signals are assembled wherein each multiplexed signal comprises a multiplexed combination of the data bits of ISDN D-channel signals retrieved from memory. The multiplexed signals are then output during a second frame period.