发明名称 |
Scan path forming circuit |
摘要 |
A connection circuit (CC) is formed by selectors (2,3) and a flip-flop (4). Th selectors (2,3) are switch-controlled by a test holding control signal (thld) and a shift mode control signal (sm) respectively. A scan-in terminal (si) is connected to a data input 0 terminal of the selector (2), while an output terminal of the flip-flop (4) is connected to its data input 1 terminal. An output terminal of the selector (2) is connected to a data input 1 terminal of the selector (3). An input terminal (d) is connected to a data input 0 terminal of the selector (3). An output terminal of the selector (3) is connected to an input terminal of the flip-flop (4). The output terminal of the flip-flop (4) is also connected to a scan-out terminal (so) and an output terminal (q) of the connection circuit (CC). In an ordinary operation, data is inputted through the input terminal (d). Thus, a scan path forming circuit attaining a high-speed operation in an ordinary operation is provided.
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申请公布号 |
US5903579(A) |
申请公布日期 |
1999.05.11 |
申请号 |
US19960653471 |
申请日期 |
1996.05.24 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
OSAWA, TOKUYA;MAENO, HIDESHI |
分类号 |
G01R31/28;G01R31/3185;G06F11/22;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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