| 摘要 |
<p>A non-volatile semiconductor memory device according to the present invention includes: a matrix of word lines and bit lines intersecting one another; and a memory cell of a stack gate type being disposed so as to correspond to each intersection of the matrix of the bit lines and the word lines, the memory cell including a control gate, a drain, and a source, the control gate being coupled to a corresponding one of the word line, the drain being coupled to a corresponding one of the bit lines, and the memory cell being capable of performing a write operation and an erase operation based on an FN tunnel phenomenon. Data is written to the memory cell by applying a reference voltage to the control gate, a first voltage to a well in which the memory cell is formed, and a second voltage to the drain; and data is erased from the memory cell by applying a third voltage to the control gate and the reference voltage to the well. Each of the first, second, and third voltages is equal to or greater than zero volts, and the second voltage is greater than the first voltage. <IMAGE></p> |
