Asynchronous interface

摘要

An interface allowing to transfer serial test data from a Test Access Port (TAP) to controllers located in several clock domains is described. The clock frequencies can be different from each other and do not need to be related in phase to each other or with the clock of the TAP. The interface is proven to work reliably as long as the clock frequencies used for the test controllers and registers is 3 times higher than the one of the TAP used to source the serial test data.