发明名称 IMAGE MAGNIFICATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To produce smooth magnification interpolation image data and to improve the image quality after magnification by making a circuit configuration that includes as selection circuit which selects write data to line memory, vertical/horizontal interpolation arithmetic circuits which produce vertical/ horizontal interpolation line data and vertical/horizontal interpolation parameter generation circuits which generate an arithmetic parameter. SOLUTION: In a vertical magnification operation in an image magnification circuit, a frame memory read signal generation circuit 1 reads data from frame memory 2. A selection circuit 7 selects data of the memory 2 or frame memory 5. A vertical interpolation arithmetic circuit 9 applies a frame memory arithmetic parameter to data that is read from the memory 2, also applies a line memory arithmetic parameter to data that is read from the memory 5, makes data after vertical interpolation by finally adding both data and outputs the data to a horizontal interpolation arithmetic circuit 11.
申请公布号 JPH11122480(A) 申请公布日期 1999.04.30
申请号 JP19970281702 申请日期 1997.10.15
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MAIKUMA HIDEKI
分类号 H04N1/393;G06T3/40;(IPC1-7):H04N1/393 主分类号 H04N1/393
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