| 摘要 |
<p>PROBLEM TO BE SOLVED: To inhibit an outsider from erasing easily the contents which are stored in a memory cell by inhibiting the operations that are designated by the data which designate the inhibition of at least one of data writing, reading and erasing operations to a nonvolatile memory. SOLUTION: When a clock generation dividing circuit 49 outputs an operation inhibition/authorization register reading request signal on a signal line 55, the data which are read out of a memory cell 42 are outputted to a data bus 5 via a data writing/reading/erasing control circuit 9 and also stored in an operation inhibition/authorization register 45. Thus, these data are written into the register 45 in a power on reset mode and thereafter the contents of a memory cell 1 cannot be erased when the data are written into the cell 42 storing the data on the register 45 to inhibit its erasing operation.</p> |
