| 摘要 |
PROBLEM TO BE SOLVED: To control a current leakage from a source/drain of a MOS transistor. SOLUTION: In a memory cell area 101a, intervals between gate electrodes 105a are made narrow. Formed on a side wall of each of the gate electrodes 105a is a spacer 106a. In the memory cell area 101a, accordingly, an insulating film 109 is provided so as to bury spaces between the gate electrodes 105a and spacers 106a. In a peripheral circuit area 101b, however, since gate electrodes 105b are formed widely in their ambient areas, it can be avoided that the insulating film 109 is formed to reach as far as an upper position of the spacer 106a on the gate electrode 105b. Accordingly the thickness of the insulating film 109 deposited on the top part of the spacer 106a on the gate electrode 105b becomes substantially equal to that of the insulating film 109 around the gate electrode 105b. |
