发明名称 METHOD FOR TESTING SEMICONDUCTOR INTEGRATED CIRCUIT, AND SEMICONDUCTOR INTEGRATED CIRCUIT TO BE USED THEREFOR
摘要 PROBLEM TO BE SOLVED: To early investigate the cause of a trouble difficult in the specification of cause. SOLUTION: A back-up register 15 for storing the history of access contents from a host computer is included in a target LSI 10. When a hang-up state occurs due to some cause, modules 14-1 to 14-3 can not respond. Thereby data are not outputted from an FIFO 12 to respective modules 14-1 to 14-3, so that data overflow from the FIFO 12. Consequently the hand-up state is left in the register 15. Therefore the stored contents of the register 15 are checked and analyzed by using an exclusive tool.
申请公布号 JPH1196038(A) 申请公布日期 1999.04.09
申请号 JP19970255311 申请日期 1997.09.19
申请人 NEC CORP 发明人 SHIGEMOTO KATSUHIRO
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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