发明名称 Circuit and method for reducing flicker
摘要 A flicker reducing circuit that can prevent a degradation of an image by performing an outline blur correction together with a flicker reduction. In the flicker reducing circuit, a vertical contour detecting circuit detects an outline of the vertical component of a horizontal straight line. A switch selects an addition signal from the vertical low-pass filter for a period during which it is judged that an outline corresponds to the vertical component of a horizontal straight line according to the detection signal. The addition signal is obtained by adding the low-frequency component of a spatial frequency in a vertical direction to an output signal from the differentiating circuit. During other periods, the switch selects a delay display signal not subjected to a filtering process, output from the delaying circuit. Thus, a display signal processed for flicker reduction and blur correction can be output only to a flicker noticeable area such as one horizontal line in graphic data, in addition to character displaying positions.
申请公布号 US5892551(A) 申请公布日期 1999.04.06
申请号 US19970954941 申请日期 1997.10.22
申请人 NEC CORPORATION 发明人 UEMATSU, TAKESHI
分类号 G09G1/00;G09G5/00;H04N5/14;H04N5/21;H04N5/445;(IPC1-7):H04N7/01 主分类号 G09G1/00
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