| 摘要 |
<p>A system including a host (102) coupled to a memory device (108) and a peripheral controller device (120). The host (102) is coupled to the peripheral controller device (120) via bus (124) having a plurality of general purpose signal lines to carry time-multiplexed address, data, and control information. The peripheral controller device (120) performs a direct memory access (DMA) transactions with the memory device (108) via the host (102) the bus (124).</p> |
