| 摘要 |
PROBLEM TO BE SOLVED: To reduce the power consumption by not supplying the clocks that execute the operations of the memories, in which no writing and reading are conducted, among the plural memories which are connected in parallel. SOLUTION: Writing clocks 16 transmitted along with data 17 and writing addresses 15 are respectively inputted into AND circuits 6 to 9 which are provided corresponding to memories 1 to 4, and a 1 →n decoder 5. The 1 →n decoder 5 transmits flags to the circuits 6 to 9 from memory specified bits of the address 15 and data 17 are written into the addresses of the memories 1 to 4 indicated by the address specified bits through the clocks 16. If the data are to be read, the reading address 18 and clocks 19 are transmitted, respectively inputted to AND circuits 11 to 14 and a 1 → n decoder 10, the clocks 19 are supplied to the specified addresses similar to the case of the writing and the data 17 are read. The clocks are supplied to the memories only, on which writings and readings are executed. |
