发明名称 Semiconductor integrated circuit and manufacturing method of the same
摘要 A dual diffusion layer composed of an n- type diffusion layer 5 and an n+ type diffusion layer 6 is formed in a first element forming region element-separated by a field oxidized film 2, a p+ type diffusion layer 7 is formed in a second element forming region, a p type guard ring layer 3 provided below the field oxidized film 2 and the cathode n+ type diffusion layer 6 are placed adjacent to each other, and thus reach-through breakdown voltage is made lower than that of an internal transistor.
申请公布号 US5880501(A) 申请公布日期 1999.03.09
申请号 US19970805463 申请日期 1997.02.26
申请人 NEC CORPORATION 发明人 NAGAI, TAKAYUKI
分类号 H01L29/861;(IPC1-7):H01L23/62 主分类号 H01L29/861
代理机构 代理人
主权项
地址