发明名称 |
Asymmetric channel doped MOS structure and method for same |
摘要 |
<p>A method of forming a MOS transistor without a lightly doped drain (LDD) region between the channel region and drain is provided. The channel region is formed from a tilted ion implantation after the deposition of the gate oxide layer. The tilted implantation forms a relatively short channel length, with respect to the length of the gate electrode. The position of the channel is offset, and directly adjoins the source. The non-channel area under the gate, adjacent the drain, replaces the LDD region between the channel and the drain. This drain extension acts to more evenly distribute electric fields so that large breakdown voltages are possible. The small channel length, and eliminated LDD region adjacent the source, act to reduce resistance between the source and drain. In this manner, larger Id currents and faster switching speeds are obtained. A MOS transistor having a short, offset channel and drain extension is also provided. <IMAGE></p> |
申请公布号 |
EP0898304(A2) |
申请公布日期 |
1999.02.24 |
申请号 |
EP19980306253 |
申请日期 |
1998.08.05 |
申请人 |
SHARP KABUSHIKI KAISHA;SHARP MICROELECTRONICS TECHNOLOGY, INC. |
发明人 |
HSU, SHENG TENG;LEE, JONG JAN |
分类号 |
H01L29/78;H01L21/336;H01L29/786;(IPC1-7):H01L21/336 |
主分类号 |
H01L29/78 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|