| 摘要 |
PROBLEM TO BE SOLVED: To accelerate the comparison of a pair of data and the selection of two resultant pairs of the data. SOLUTION: From four registers specified by a comparison and selection instruction inside a register circuit 2, a pair of data (a) and (b) are supplied to an arithmetic and logic circuit (ALU) 3 and a selection circuit 4, and the other pair of data (e) and (f) are supplied to a selection circuit 5. In the ALU 3, the size of the data (a) and (b) is compared. The selection circuits 4 and 5 select one, smaller one for instance, of the data (a) and (b) corresponding to the compared result, while the selection circuit 5 selects the smaller one of the data (e) and (f). Two data (c) and (g) selected in the selection circuits 4 and 5 are written in the predetermined pair of the registers inside the register circuit 2. |
