| 摘要 |
PROBLEM TO BE SOLVED: To avoid that the operation of a CPU becomes indefinite even when power source voltage of the CPU rises. SOLUTION: Since a CPU monitoring circuit 16 is equipped with a comparator 22 for detecting that power source voltage Vcc rises higher than an upper limit voltage Vref2 , a voltage rising signal is outputted from the comparator 22 and transmitted to a CPU monitoring logical part 26 by way of an OR gate 24 when an abnormality occurs to a power source 14 and the power source voltage Vcc rises higher than the upper limit threshold voltage Vref2 . At the time of rising of the power source voltage like this, as there is a fear of the CPU 12's operation becoming indefinite, the CPU monitoring logical part 26 restarts up the CPU 12 and at the same time invalidates all the control signals from the CPU 12 by inputting a signal which is inverted high level signal, to an AND gate 18. |
