发明名称 MULTILEVEL MEMORY AND SEMICONDUCTOR MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To provide a multilevel storage type non-volatile memory in a minimum possible circuit scale, and highly accurate and high speed writing, reading, and erasing operation can be performed. SOLUTION: This storage device is constituted so that a threshold value of a memory cell is set to three steps or more, while data of two bits or more are stored in one memory cell by varying a level of a work line by two steps or more. In this case, this device is provided with binary data registers REG1, REG2 holding inputted writing data, a data conversion logic circuit 11 performing a prescribed operation for plural bits of inputted data and converting them into multilevel data in accordance with their combination, and an inverse conversion logic circuit 14 converting multilevel data read out from a memory cell into the original binary data.</p>
申请公布号 JPH1125682(A) 申请公布日期 1999.01.29
申请号 JP19980048162 申请日期 1998.02.27
申请人 HITACHI LTD 发明人 MIWA HITOSHI;KOTANI HIROAKI
分类号 G11C16/02;(IPC1-7):G11C16/02 主分类号 G11C16/02
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