发明名称 SDRAM AND DATA PROCESSING DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To sufficiently reduce temperature dependence of a device, power source voltage dependence, process dispersion, and the like. SOLUTION: When a load element is coupled to an output node of a unit delay circuit in a first delay circuit train 600, a load element is coupled to an output node of a unit delay circuit in a second delay circuit train 800 also, wherein loading conditions of each circuit are equalized. With such arrangements, wave-form characteristics in rise and fall (tr/tf) and a delay time of the first delay circuit train 600 and the second delay circuit train 800 are equalized, and deviation of a center axis of error in a low frequency band and a high frequency band is reduced.</p>
申请公布号 JPH1125671(A) 申请公布日期 1999.01.29
申请号 JP19970173390 申请日期 1997.06.30
申请人 HITACHI LTD;HITACHI MICROCOMPUT SYST LTD 发明人 MIYAUCHI HIDETOSHI;FUJISAWA HIROKI;ENDO HITOSHI;NAKAMURA MASAYUKI
分类号 G11C11/407;G06F1/10;(IPC1-7):G11C11/407 主分类号 G11C11/407
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