摘要 |
<p>PROBLEM TO BE SOLVED: To correctly conduct processing, in response to deviation of a presentation time stamp PTS from a system time clock STC, with a simple configuration. SOLUTION: In the case of storing decoded image data of an image to a memory 23, a PTS 1 corresponding to the image data and a valid/invalid flag F1 are stored a border address ADR1 at a heat of a storage area of the image in the memory 23, the ADR 1 is stored tentatively in a register circuit 211. While reading sequentially data from the memory 23 for image display, matching between the read address ADR and any of addresses ADR1-ADR3 in the register circuit 211 is detected, and when matching is detected, data read from the memory 23 are acquired as the PTS and the F. In the case that the F denotes validity, control in response to a time difference between the STC and the obtained PTS is conducted. When no matching is detected, the data read from the memory 23 are used as a display decoding image data DAT 4.</p> |