| 摘要 |
<p>A sequential access memory consists of a number (N) of recording elements, each memorising one bit of information and distributed into P groups, each of L elements. In an initial operating phase, with a duration corresponding to P-1 consecutive clock signal periods, only the last element in each group, connected in series, is activated. During a second operating phase, with a duration corresponding to a single clock signal period, all the elements are activated.</p> |
