| 摘要 |
A driver circuit for capacitively loaded lines. The driver circuit has both precharge/pull-low and hold-high. The capacitively loaded line is precharged during a precharge phase of a clock signal. The driver circuit is active only during a drive phase of a clock signal. The driver has a hold-up transistor that is sufficiently large to suppress noise coupled into the line during the drive phase, but is substantially smaller than what is required to make pull-up time equal to pull-down time. The driver circuit provides the low noise characteristics of push-pull but with less circuit area and line capacitance than typical push-pull driver circuits.
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