发明名称 Obviating address pin connections in a system for processing digital information
摘要 A plug-in unit, usable for digital video/audio compression, is composed of integrated circuit devices 102, 103, 104 and is connected via a parallel port interface 117, 118 to a host computer 124 so that the device 103 can access memory in the host as if the memory were directly connected to the device. A test interface, such as the IEEE 1149.1 boundary-scan port, is used to find out the state of the address pins of device 103, whereby external connections to these pins are unnecessary. Data compression (details are given) is performed partly in the unit and partly in the host computer. The unit is software-(re)configurable whilst in operation.
申请公布号 GB2326493(A) 申请公布日期 1998.12.23
申请号 GB19980007795 申请日期 1998.04.09
申请人 * EIDOS TECHNOLOGIES LIMITED 发明人 STEPHEN BERNARD * STREATER;FRANK ANTOON * VORSTENBOSCH;BRIAN DAVID * BRUNSWICK
分类号 G01R31/3185;H04N7/26;(IPC1-7):G06F12/00;G06F15/16 主分类号 G01R31/3185
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