发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To effectively prevent the faulty insulation of the interlayer insulating layer on a MIS transistor even in the formation of an emitter electrode of the so-called double self-alignment structure. SOLUTION: The etching stopping film of a base electrode is left on a MIS transistor region, and the left-over film is recessed as the etching stopping film when an emitter electrode is processed. In concrete terms, first, the first aperture part 8a is formed on the first interlayer insulating layer 8, and a base electrode 12, which covers the aperture part, and the second interlayer insulating layer 13 (offset insulating layer) are successively formed. After formation of a side wall spacer 14 on the inner wall of the second aperture part 12b, the base electrode 12 is patterned in such a manner that the second interlayer insulating layer 13 is left on the base electrode 12. A conductive layer, which becomes an emitter electrode 16, is formed, and after its surface is lightly etched, a low resistance layer is formed and it is etched into the prescribed pattern together with the lower layer of the conductive layer.
申请公布号 JPH10335509(A) 申请公布日期 1998.12.18
申请号 JP19970138963 申请日期 1997.05.28
申请人 SONY CORP 发明人 YOSHIHARA IKUO
分类号 H01L27/06;H01L21/8244;H01L21/8249;H01L27/10;H01L27/11 主分类号 H01L27/06
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