发明名称 INTEGRATED CIRCUIT CHIP STRUCTURE FORIMPROVED PACKAGING
摘要 PROBLEM TO BE SOLVED: To individually and/or independently test two parts by a method wherein a bonding pad is electrically connected to a first part, and a second part is electrically connected to a contact region having a smaller dimension and formed on a chip than the bonding pad. SOLUTION: A drain electrode 26 of a transistor T16 is connected to two bonding pads 30, and to a composite bonding pad 36. The pad 36 includes two separated portions, namely a large portion 40 connected to the electrode 26 and a small portion 42 separated electrically by a small gap 66 enclosed substantially by the portion 40. The portion 42 is connected to a Zener diode 20 via a test pad 46. As the portions 40, 42 are electrically insulated to each other, it becomes possible to make separate electrical tests of the diode 20 and the transistor T16 by a separate test probe coming into contact with the portion 40 and pad 46, respectively.
申请公布号 JPH10335372(A) 申请公布日期 1998.12.18
申请号 JP19980137237 申请日期 1998.05.19
申请人 HARRIS CORP 发明人 PRESLAR DONALD R;HALE JOHN C
分类号 H01L21/60;H01L23/485 主分类号 H01L21/60
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