发明名称 Layout structure of semicondutor device
摘要 <p>Integrated circuit regions are formed on an integrated circuit wafer. The integrated circuit wafer includes scribe regions located between the integrated circuit regions, the scribe regions include test pads that are electrically connected to the test circuits of integrated circuit regions via conductive lines. Test functions are provided to the test circuits in the integrated circuit regions via the test pads to determine the operability of the integrated circuit regions. The integrated circuit regions are separated from the plurality of scribe regions and the plurality of test pads located therein. Separating the integrated circuit regions from the scribe regions and the test pads, thereby may allow a reduction in the number of pads in the integrated circuits and a corresponding decrease in the size of respective integrated circuit packages.</p>
申请公布号 GB9822941(D0) 申请公布日期 1998.12.16
申请号 GB19980022941 申请日期 1998.10.20
申请人 SAMSUNG ELECTRONICS CO. LTD. 发明人
分类号 H01L23/52;H01L21/301;H01L21/3205;H01L21/82;H01L21/822;H01L21/8242;H01L23/485;H01L23/58;H01L27/04;H01L27/108 主分类号 H01L23/52
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