Method and apparatus for improving bus efficiency by enabling arbitration based upon availability of completion data

摘要

The present invention provides a system that selectively allows an arbitration cycle to occur only when specific data is ready for transfer. That is, a flag register is provided and its output is ANDed with a bus request signal from a bus device. An arbiter will accept a bus request and initiate an arbitration cycle only when the state of a bit in the flag register indicates that actual completion data exists for the requesting device.