发明名称 WAFER STAGE FOR ALIGNER
摘要 <p>PROBLEM TO BE SOLVED: To drastically reduce the occurrence of abnormal exposure by forming a plurality of notched adjacent grooves, serving as wafer attraction portions in a wafer mounting region of a stage body, and providing the entire wafer mounting region other that the wafer attraction portions with a recessed escape portion for avoiding dust. SOLUTION: A wafer stage has a structure, wherein a center axis 3 is inserted into a center hole 2 of a disk-shaped stage body 1. A wafermounting region M for mounting a wafer is made on the surface of the stage body 1. This wafer mounting region M is provided with two ringshaped wafer attraction portions 4 and 5 and an escape portion 6. The wafer attraction portion 4 is formed around the periphery of the center hole 2 on the surface of the stage body 1, by notching a plurality of concentric grooves 40 having a given depth. Likewise, the wafer attraction portion 5 is formed along the peripheral edge of the wafer mounting region M on the surface of the stage body 1 by notching a plurality of concentric grooves 50.</p>
申请公布号 JPH10321708(A) 申请公布日期 1998.12.04
申请号 JP19970125531 申请日期 1997.05.15
申请人 SONY CORP 发明人 NISHIMURA HIDEKUNI
分类号 G03F7/20;H01L21/027;H01L21/683;(IPC1-7):H01L21/68 主分类号 G03F7/20
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