发明名称 SKEW REDUCTION CIRCUIT AND SEMICONDUCTOR DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To easily control the transition time of each edge by comparing the edge phases with each other between a clock signal, having its controlled phase and a delayed clock signal and performing the control to satisfy a prescribed relation between both edges. SOLUTION: A phase delay circuit 12 delays a clock signal CLK1 by a prescribed amount. The phase value to be delayed is 180 degrees, that is, the signal CLK1 is delayed by only T/2, as long as the signal CLK1 has a cycle T. A phase comparison circuit 13 compares the phases with each other between the leading edge of the signal CLK1 and the trailing edge of a delayed clock signal CLK2 and then controls a phase control circuit 11, so as to secure the same timing between both edges. Conversely, the phases are compared with each other between the trailing edge of the signal CLK1 and the leading edge of the signal CLK2, and the circuit 11 is controlled to secure the same timing between both edges. With such a control, equality is established between a high period Thigh and a low period Tlow of the signal CLK1.</p>
申请公布号 JPH10322177(A) 申请公布日期 1998.12.04
申请号 JP19970127584 申请日期 1997.05.16
申请人 FUJITSU LTD 发明人 HIGUCHI TAKESHI
分类号 G06F13/42;G06F1/10;G11C11/407;G11C11/4076;H03K5/13;H03K19/0175;(IPC1-7):H03K5/13;H03K19/017 主分类号 G06F13/42
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