发明名称 Isolation wall between power device
摘要 <p>The isolating wall is a highly doped layer having a concentration above 10&lt;1&gt;6 atoms per 1 cm&lt;3&gt; of carriers. The layer forms a central section in a power semiconductor chip, separating two elementary components in separate compartments. One of the components operates at a high current density.</p>
申请公布号 EP0881672(A1) 申请公布日期 1998.12.02
申请号 EP19980410055 申请日期 1998.05.22
申请人 STMICROELECTRONICS S.A. 发明人 DUCLOS, FRANCK;RAMI, FABIEN
分类号 H01L29/73;H01L21/331;H01L21/761;H01L27/08;H01L29/732;H01L29/74;H01L29/747;(IPC1-7):H01L21/761 主分类号 H01L29/73
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