发明名称 Method to increase capacitance of a DRAM cell
摘要 A process for forming an HSG silicon layer, to be used as a component of, as well as to increase the surface area of, a polysilicon storage node electrode, has been developed. The process features initially depositing a polysilicon composite, comprised of underlying, undoped polysilicon layer, and an overlying, doped polysilicon silicon layer, resulting in an initial degree of surface roughness. The process continues with the deposition of an amorphous silicon layer, and an in situ anneal procedure, resulting in the conversion of the amorphous silicon layer, to a HSG silicon layer. The storage node electrode is then formed, comprised of the roughened HSG silicon layer, overlying the polysilicon composite.
申请公布号 US5837582(A) 申请公布日期 1998.11.17
申请号 US19980083418 申请日期 1998.05.22
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 SU, CHUNG-HUI
分类号 H01L21/02;H01L21/8242;(IPC1-7):H01L21/824 主分类号 H01L21/02
代理机构 代理人
主权项
地址